clk: sunxi-ng: mux: Increase fixed pre-divider div size

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Some clocks have a predivider value that is larger than what u8 can
store. One such example is the OUT clk found on A20/A31, which has
a /750 pre-divider on one of the osc24M parents.

Increase the size of the div field to u16.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

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Chen-Yu Tsai 2016-07-26 15:04:25 +08:00 • committed by Maxime Ripard

parent 29b4817d40

commit 178ca5312a

2 changed files with 2 additions and 2 deletions

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2

drivers/clk/sunxi-ng/ccu_mux.c

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2

drivers/clk/sunxi-ng/ccu_mux.h

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