drm/amdkfd: enable heavy-weight TLB flush on Vega20

It is to meet the requirement for memory allocation
optimization on MI50.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Huang 2022-01-21 10:39:54 -05:00 • committed by Alex Deucher
commit 1790b649b0