drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths

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Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
with regards of workaround introduced by:

commit 27c1cbd06a
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Apr 9 13:59:46 2012 +0100

    drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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This commit is contained in:

Mika Kuoppala 2012-10-29 16:59:26 +02:00 • committed by Daniel Vetter

parent 00c09d70df

commit 17f10fdc01

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/i915/intel_ringbuffer.c

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