drm/i915: Replace hardcoded cacheline size with macro

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For readibility and guess at the meaning behind the constants.

v2: Claim only the meagerest connections with reality.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Chris Wilson 2014-04-09 09:19:40 +01:00 • committed by Daniel Vetter

parent 93c9c19b3d

commit 18393f6322

1 changed files with 21 additions and 13 deletions

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34

drivers/gpu/drm/i915/intel_ringbuffer.c

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