drm/i915/icl: add the main CDCLK functions

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This commit adds the basic CDCLK functions, but it's still missing
pieces of the display initialization sequence.

v2:
 - Implement the voltage levels.
 - Rebase.
v3:
 - Adjust to the new "bypass" clock (Imre).
 - Call intel_dump_cdclk_state() too.
 - Rename a variable to avoid confusion.
 - Simplify the DVFS part.
v4:
 - Remove wrong bit definition (James).
 - Also drive-by fix the coding style for the register definition we
   touched.
v5:
 - Comment style (checkpatch).

Cc: James Ausmus <james.ausmus@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180206193346.18272-1-paulo.r.zanoni@intel.com

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This commit is contained in:

Paulo Zanoni 2018-02-06 17:33:46 -02:00

parent 62d4a5e149

commit 186a277e31

3 changed files with 257 additions and 17 deletions

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35

drivers/gpu/drm/i915/i915_reg.h

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237

drivers/gpu/drm/i915/intel_cdclk.c

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2

drivers/gpu/drm/i915/intel_drv.h

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