drm/i915: Enable LVDS downclock feature through EDID.

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If more than one mode with the same resolution defined in EDID has different
refresh rate, it is thought that the downclock is found for LVDS.
We will program the different FPx0/1 register so that we can select dynamically
between the low and high frequency.

On the g4x platform we will use the CxSR feature to switch the different
refresh rate if the LVDS downclock feature is supported.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>

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Zhao Yakui 2009-11-20 03:24:16 +00:00 • committed by Eric Anholt

parent c8e0f93a38

commit 18f9ed12f8

3 changed files with 72 additions and 3 deletions

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2

drivers/gpu/drm/i915/i915_drv.h

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17

drivers/gpu/drm/i915/intel_display.c

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56

drivers/gpu/drm/i915/intel_lvds.c

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