net: stmmac: setup higher frequency clk support for EHL & TGL

EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
ptp clock and ptp_max_adj to 200MHz.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Voon Weifeng 2019-08-27 09:38:11 +08:00 • committed by David S. Miller
commit 190f73ab4c
3 changed files with 25 additions and 0 deletions