drm/i915: Add eDP support for Valleyview

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Eventhough Valleyview display block is derived from Cantiga, VLV
supports eDP. So, added eDP checks in i9xx_crtc_mode_set path.

v2: use different DPIO_DIVISOR values for VGA, DP and eDP
v3: fix DPIO value calculation to use same values for all display
interfaces
v4: removed unconditional enabling of 6bpc dithering based on comments
from Daniel & Jani Nikula. Also changed the display enabling order to
force eDP detection first.

Signed-off-by: Gajanan Bhat <gajanan.bhat@intel.com>
Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Gajanan Bhat 2012-09-27 19:13:07 +05:30 • committed by Daniel Vetter

parent 2a8f64ca23

commit 19c03924d4

2 changed files with 24 additions and 8 deletions

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15

drivers/gpu/drm/i915/intel_display.c

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17

drivers/gpu/drm/i915/intel_dp.c

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