arm64: dts: ti: k3-j721e-beagleboneai64: Fix reversed C6x carveout locations

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The DMA carveout for the C6x core 0 is at 0xa6000000 and core 1 is at
0xa7000000. These are reversed in DT. While both C6x can access either
region, so this is not normally a problem, but if we start restricting
the memory each core can access (such as with firewalls) the cores
accessing the regions for the wrong core will not work. Fix this here.

Fixes: fae14a1cb8 ("arm64: dts: ti: Add k3-j721e-beagleboneai64")
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240801181232.55027-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

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Andrew Davis 2024-08-01 13:12:32 -05:00 • committed by Nishanth Menon

parent 9f3814a7c0

commit 1a314099b7

1 changed files with 2 additions and 2 deletions

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arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts

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