clk: at91: sam9x7: update pll clk ranges

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[ Upstream commit c7f7ddbd27 ]

Update the min, max ranges of the PLL clocks according to the latest
datasheet to be coherent in the driver. This patch solves the issues in
configuring the clocks related to peripherals with the desired frequency
within the range.

Fixes: 33013b43e2 ("clk: at91: sam9x7: add sam9x7 pmc driver")
Suggested-by: Patrice Vilchez <Patrice.Vilchez@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Link: https://lore.kernel.org/r/20250714093512.29944-1-varshini.rajendran@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Varshini Rajendran 2025-07-14 15:05:12 +05:30 • committed by Greg Kroah-Hartman

parent b2e294216b

commit 1a43f53b0e

1 changed files with 10 additions and 10 deletions

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drivers/clk/at91/sam9x7.c

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