drm/i915/cnl: Fix PORT_TX_DW5/7 register address

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Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is
defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address
is defined 0x162EDC instead of 0x162E5C, fix it.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Fixes: 04416108cc ("drm/i915/cnl: Add registers related to voltage swing sequences.")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180215095643.3844-2-mahesh1.kumar@intel.com
(cherry picked from commit e103962611)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Mahesh Kumar 2018-02-15 15:26:41 +05:30 • committed by Rodrigo Vivi

parent 72a6d72c2c

commit 1b0008450f

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/i915/i915_reg.h

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