spi: tegra210-quad: combined sequence mode

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Add combined sequence mode supported by Tegra QSPI controller.
For commands which contain cmd, addr, data parts to it, controller
can accept all 3 transfers at once and avoid interrupt for each
transfer. This would improve read & write performance.

Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Link: https://lore.kernel.org/r/20220307165519.38380-3-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Krishna Yarlagadda 2022-03-07 22:25:18 +05:30 • committed by Mark Brown

parent 75a1b44a54

commit 1b8342cc4a

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drivers/spi/spi-tegra210-quad.c

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