KVM: MIPS/TLB: Handle virtually tagged icaches

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When TLB entries are invalidated in the presence of a virtually tagged
icache, such as that found on Octeon CPUs, flush the icache so that we
don't get a reserved instruction exception even though the TLB mapping
is removed.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org

...

This commit is contained in:

James Hogan 2017-03-14 10:25:46 +00:00

parent 4fa9de5a64

commit 1c506c9c10

1 changed files with 14 additions and 0 deletions

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arch/mips/kvm/tlb.c

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