drm/amd/pm: reverse mclk clocks levels for SMU v13.0.5

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commit c1d35412b3 upstream.

This patch reverses the DPM clocks levels output of pp_dpm_mclk.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels that from
the DFPstateTable are given the reversed orders by PMFW. Like the
memory DPM clocks that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

...

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Tim Huang 2023-05-21 10:28:05 +08:00 • committed by Greg Kroah-Hartman

parent 0f8f233ed7

commit 1c729bd5b3

1 changed files with 3 additions and 2 deletions

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drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c

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