dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC

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This cache controller is also used on the StarFive JH7110 SoC.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

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Emil Renner Berthing 2022-12-20 09:12:44 +08:00 • committed by Conor Dooley

parent 1b929c02af

commit 1caf002efa

1 changed files with 8 additions and 1 deletions

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Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml

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