spi: xilinx: add force_irq for QSPI mode

Xilinx PG158 page 80 [1] states that master transaction inhibit bit must
be set to properly setup the transaction in QSPI mode. Add the force_irq
flag to follow this sequence.

[1] https://docs.xilinx.com/r/en-US/pg153-axi-quad-spi/Dual/Quad-SPI-Mode-Transactions

Signed-off-by: Vadim Fedorenko <vadfed@meta.com>
Link: https://lore.kernel.org/r/20230214135928.1253205-1-vadfed@meta.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Vadim Fedorenko 2023-02-14 05:59:28 -08:00 • committed by Mark Brown
commit 1dd46599f8
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2 changed files with 8 additions and 2 deletions