drm/i915/ltphy: Program the VDR PLL registers for LT PHY

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Fetch the tables which need to be used and program it in
the specified VDR register space. Everything is done over
the respective lanes.

Bspec: 68862, 74500
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20251101032513.4171255-10-suraj.kandpal@intel.com

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This commit is contained in:

Suraj Kandpal 2025-11-01 08:54:57 +05:30

parent dc5742b619

commit 1dd885d509

3 changed files with 45 additions and 5 deletions

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7

drivers/gpu/drm/i915/display/intel_cx0_phy.c

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5

drivers/gpu/drm/i915/display/intel_cx0_phy.h

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38

drivers/gpu/drm/i915/display/intel_lt_phy.c

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