m68k: mvme147,mvme16x: Don't wipe PCC timer config bits

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[ Upstream commit 43262178c0 ]

Don't clear the timer 1 configuration bits when clearing the interrupt flag
and counter overflow. As Michael reported, "This results in no timer
interrupts being delivered after the first. Initialization then hangs
in calibrate_delay as the jiffies counter is not updated."

On mvme16x, enable the timer after requesting the irq, consistent with
mvme147.

Cc: Michael Pavone <pavone@retrodev.com>
Fixes: 7529b90d05 ("m68k: mvme147: Handle timer counter overflow")
Fixes: 19999a8b87 ("m68k: mvme16x: Handle timer counter overflow")
Reported-and-tested-by: Michael Pavone <pavone@retrodev.com>
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Link: https://lore.kernel.org/r/4fdaa113db089b8fb607f7dd818479f8cdcc4547.1617089871.git.fthain@telegraphics.com.au
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

...

This commit is contained in:

Finn Thain 2021-03-30 18:37:51 +11:00 • committed by Greg Kroah-Hartman

parent 7c468deae3

commit 1dfb26df15

3 changed files with 19 additions and 12 deletions

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3

arch/m68k/include/asm/mvme147hw.h

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14

arch/m68k/mvme147/config.c

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14

arch/m68k/mvme16x/config.c

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