ARM: S5PV310: Limit the irqs which support cascade interrupt

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The irqs from SPI(0) to SPI(39) and SPI(51), SPI(53) are connected to the
interrupt combiner. This patch limits the irqs which should be initialized
to support cascade interrupt.

Signed-off-by: Changhwan Youn <chaos.youn@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

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Changhwan Youn 2010-11-29 17:04:46 +09:00 • committed by Kukjin Kim

parent b45756f65d

commit 1f2d6c49f0

1 changed files with 9 additions and 0 deletions

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arch/arm/mach-s5pv310/cpu.c

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