[IA64] Disable/re-enable CPE interrupts on Altix

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When the CPE handler encounters too many CPEs (such as a solid single
bit memory error), it sets up a polling timer and disables the CPE
interrupt (to avoid excessive overhead logging the stream of single
bit errors).  disable_irq_nosync() calls chip->disable() to provide
a chipset specifiec interface for disabling the interrupt.  This patch
adds the Altix specific support to disable and re-enable the CPE interrupt.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>

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Russ Anderson 2007-10-31 11:10:38 -05:00 • committed by Tony Luck

parent adb34022eb

commit 1f3b6045f7

2 changed files with 8 additions and 2 deletions

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2

arch/ia64/kernel/mca.c

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8

arch/ia64/sn/kernel/irq.c

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