drm/i915/dg2: Add cdclk table and reference clock

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Note that DG2 only has a single possible refclk frequency (38.4 MHz).

v2:
 - Drop two now-unused cdclk entries

Bspec: 54034
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721223043.834562-12-matthew.d.roper@intel.com

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This commit is contained in:

Matt Roper 2021-07-21 15:30:36 -07:00

parent 3176fb663c

commit 1f3e84c4ed

1 changed files with 20 additions and 2 deletions

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22

drivers/gpu/drm/i915/display/intel_cdclk.c

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