riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format

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Change the timer layout in the dtb to fit the format that needed by
the SBI.

Fixes: 967a94a92a ("riscv: dts: add initial Sophgo SG2042 SoC device tree")
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

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Inochi Amaoto 2024-01-26 17:20:00 +08:00 • committed by Arnd Bergmann

parent 0d1d824a4a

commit 1f4a994be2

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1 changed files with 48 additions and 32 deletions

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arch/riscv/boot/dts/sophgo/sg2042.dtsi

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