From 1f90a38214d52f773edd02bf02805aa905164ee0 Mon Sep 17 00:00:00 2001 From: Lad Prabhakar Date: Thu, 28 May 2026 14:47:51 +0100 Subject: [PATCH] arm64: dts: renesas: rzt2h-n2h-evk: Configure ETH pins Update the gmac1 (ETH3) and gmac2 (ETH2) pin configurations on the RZ/T2H and RZ/N2H EVK boards to comply with the electrical specifications defined in Table 58.11 of the hardware user manual. While restructuring the nodes into pin groups, fix a copy-paste comment typo in the RZ/N2H device tree where the ETH3_TXD1 pin mux configuration was mistakenly labeled as ETH3_TXD0. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260528134752.79813-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- .../dts/renesas/r9a09g077m44-rzt2h-evk.dts | 130 +++++++++++++----- .../dts/renesas/r9a09g087m44-rzn2h-evk.dts | 129 ++++++++++++----- 2 files changed, 191 insertions(+), 68 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index 987e44d0bf95..572be8aa6d7e 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -258,23 +258,54 @@ * * SW2[8] ON - use pins P33_2-P33_7 and P34_0-P34_5 for Ethernet port 3 */ - gmac1_pins: gmac1-pins { - pinmux = , /* ETH3_TXCLK */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD1 */ - , /* ETH3_TXD2 */ - , /* ETH3_TXD3 */ - , /* ETH3_TXEN */ - , /* ETH3_RXCLK */ - , /* ETH3_RXD0 */ - , /* ETH3_RXD1 */ - , /* ETH3_RXD2 */ - , /* ETH3_RXD3 */ - , /* ETH3_RXDV */ - , /* GMAC1_MDC */ - , /* GMAC1_MDIO */ - , /* ETH3_REFCLK */ - ; /* IRQ3 */ + gmac1_pins: gmac1-group { + irq-pins { + pinmux = ; /* IRQ3 */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + md-pins { + pinmux = , /* GMAC1_MDC */ + ; /* GMAC1_MDIO */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux = ; /* ETH3_REFCLK */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + }; + + rx-pins { + pinmux = , /* ETH3_RXCLK */ + , /* ETH3_RXD0 */ + , /* ETH3_RXD1 */ + , /* ETH3_RXD2 */ + , /* ETH3_RXD3 */ + ; /* ETH3_RXDV */ + input-schmitt-disable; + }; + + txclk-pins { + pinmux = ; /* ETH3_TXCLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux = , /* ETH3_TXD0 */ + , /* ETH3_TXD1 */ + , /* ETH3_TXD2 */ + , /* ETH3_TXD3 */ + ; /* ETH3_TXEN */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; }; /* @@ -283,23 +314,54 @@ * SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 * SW2[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 */ - gmac2_pins: gmac2-pins { - pinmux = , /* ETH2_TXCLK */ - , /* ETH2_TXD0 */ - , /* ETH2_TXD1 */ - , /* ETH2_TXD2 */ - , /* ETH2_TXD3 */ - , /* ETH2_TXEN */ - , /* ETH2_RXCLK */ - , /* ETH2_RXD0 */ - , /* ETH2_RXD1 */ - , /* ETH2_RXD2 */ - , /* ETH2_RXD3 */ - , /* ETH2_RXDV */ - , /* GMAC2_MDC */ - , /* GMAC2_MDIO */ - , /* ETH2_REFCLK */ - ; /* IRQ13 */ + gmac2_pins: gmac2-group { + irq-pins { + pinmux = ; /* IRQ13 */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + md-pins { + pinmux = , /* GMAC2_MDC */ + ; /* GMAC2_MDIO */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux = ; /* ETH2_REFCLK */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + }; + + rx-pins { + pinmux = , /* ETH2_RXCLK */ + , /* ETH2_RXD0 */ + , /* ETH2_RXD1 */ + , /* ETH2_RXD2 */ + , /* ETH2_RXD3 */ + ; /* ETH2_RXDV */ + input-schmitt-disable; + }; + + txclk-pins { + pinmux = ; /* ETH2_TXCLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux = , /* ETH2_TXD0 */ + , /* ETH2_TXD1 */ + , /* ETH2_TXD2 */ + , /* ETH2_TXD3 */ + ; /* ETH2_TXEN */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; }; /* diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index a66502d8d82b..4e57d4fe195c 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -341,23 +341,54 @@ * * DSW5[8] ON - use pins P33_2-P33_7 and P34_0-P34_6 for Ethernet port 3 */ - gmac1_pins: gmac1-pins { - pinmux = , /* ETH3_TXCLK */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD0 */ - , /* ETH3_TXD2 */ - , /* ETH3_TXD3 */ - , /* ETH3_TXEN */ - , /* ETH3_RXCLK */ - , /* ETH3_RXD0 */ - , /* ETH3_RXD1 */ - , /* ETH3_RXD2 */ - , /* ETH3_RXD3 */ - , /* ETH3_RXDV */ - , /* GMAC1_MDC */ - , /* GMAC1_MDIO */ - , /* ETH3_REFCLK */ - ; /* IRQ15 */ + gmac1_pins: gmac1-group { + irq-pins { + pinmux = ; /* IRQ15 */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + md-pins { + pinmux = , /* GMAC1_MDC */ + ; /* GMAC1_MDIO */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux = ; /* ETH3_REFCLK */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + }; + + rx-pins { + pinmux = , /* ETH3_RXCLK */ + , /* ETH3_RXD0 */ + , /* ETH3_RXD1 */ + , /* ETH3_RXD2 */ + , /* ETH3_RXD3 */ + ; /* ETH3_RXDV */ + input-schmitt-disable; + }; + + txclk-pins { + pinmux = ; /* ETH3_TXCLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux = , /* ETH3_TXD0 */ + , /* ETH3_TXD1 */ + , /* ETH3_TXD2 */ + , /* ETH3_TXD3 */ + ; /* ETH3_TXEN */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; }; /* @@ -367,24 +398,54 @@ * DSW5[7] ON - use pins P29_1-P29_7 and P30_0-P30_4 for Ethernet port 2 * DSW13[7] OFF; DSW13[8] ON - use pin P13_7 for IRQ14 */ - gmac2_pins: gmac2-pins { - pinmux = , /* ETH2_TXCLK */ - , /* ETH2_TXD0 */ - , /* ETH2_TXD1 */ - , /* ETH2_TXD2 */ - , /* ETH2_TXD3 */ - , /* ETH2_TXEN */ - , /* ETH2_RXCLK */ - , /* ETH2_RXD0 */ - , /* ETH2_RXD1 */ - , /* ETH2_RXD2 */ - , /* ETH2_RXD3 */ - , /* ETH2_RXDV */ - , /* GMAC2_MDC */ - , /* GMAC2_MDIO */ - , /* ETH2_REFCLK */ - ; /* IRQ14 */ + gmac2_pins: gmac2-group { + irq-pins { + pinmux = ; /* IRQ14 */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + md-pins { + pinmux = , /* GMAC2_MDC */ + ; /* GMAC2_MDIO */ + drive-strength-microamp = <5000>; + slew-rate = <0>; + input-schmitt-disable; + }; + + refclk-pins { + pinmux = ; /* ETH2_REFCLK */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + }; + + rx-pins { + pinmux = , /* ETH2_RXCLK */ + , /* ETH2_RXD0 */ + , /* ETH2_RXD1 */ + , /* ETH2_RXD2 */ + , /* ETH2_RXD3 */ + ; /* ETH2_RXDV */ + input-schmitt-disable; + }; + + txclk-pins { + pinmux = ; /* ETH2_TXCLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + input-schmitt-disable; + }; + + txd-en-pins { + pinmux = , /* ETH2_TXD0 */ + , /* ETH2_TXD1 */ + , /* ETH2_TXD2 */ + , /* ETH2_TXD3 */ + ; /* ETH2_TXEN */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; }; /*