arm64: dts: rockchip: change all interrupts cells to 4 on rk3399 SoCs

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Add the interrupts cells value for 4, and the 4th cell is zero.

Due to the doc[0] said:" the system requires describing PPI affinity,
then the value must be at least 4"
The 4th cell is a phandle to a node describing a set of CPUs this
interrupt is affine to. The interrupt must be a PPI, and the node
pointed must be a subnode of the "ppi-partitions" subnode. For
interrupt types other than PPI or PPIs that are not partitionned,
this cell must be zero. See the "ppi-partitions" node description
below.

[0]:
Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

...

This commit is contained in:

Caesar Wang 2016-09-06 02:17:14 +08:00 • committed by Heiko Stuebner

parent 4a3a3d32c7

commit 210bbd38bb

1 changed files with 52 additions and 52 deletions

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arch/arm64/boot/dts/rockchip/rk3399.dtsi

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