drm/i915/dg1: add hpd interrupt handling

Browse source

DG1 has one more combo phy port, no TC and all irq handling goes through
SDE, like for MCC.

v2: Also change intel_hpd_pin_default() to include DG1 mapping
v3, v4: Rebase on hpd refactor

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201021082034.3170478-2-lucas.demarchi@intel.com

...

This commit is contained in:

Lucas De Marchi 2020-10-21 01:20:29 -07:00

parent 71c1a49983

commit 229f31e2d3

3 changed files with 51 additions and 7 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

13

drivers/gpu/drm/i915/display/intel_ddi.c

View file

37

drivers/gpu/drm/i915/i915_irq.c

View file

8

drivers/gpu/drm/i915/i915_reg.h

View file