clk: tegra: Add missing reset deassertion

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Commit 4782c0a5dd ("clk: tegra: Don't deassert reset on enabling
clocks") removed deassertion of reset lines when enabling peripheral
clocks. This breaks the initialization of the DFLL driver which relied
on this behaviour.

Fix this problem by adding explicit deassert/assert requests to the
driver. Tested on Google Pixel C.

Cc: stable@vger.kernel.org
Fixes: 4782c0a5dd ("clk: tegra: Don't deassert reset on enabling clocks")
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>

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Diogo Ivo 2022-04-29 13:58:43 +01:00 • committed by Thierry Reding

parent 3123109284

commit 23a43cc437

1 changed files with 12 additions and 0 deletions

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drivers/clk/tegra/clk-dfll.c

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