ARMv7: Document the PRRR and NMRR registers setting

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This patch adds a comment to the proc-v7.S file for the setting of the
PRRR and NMRR registers. It also sets the PRRR[13:12] bits to 0
(corresponding to the reserved TEX[0]CB encoding 110) to be consistent
with the documentation.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

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This commit is contained in:

Catalin Marinas 2009-05-30 14:00:16 +01:00

parent 213fb2a8ee

commit 23d1c515d8

1 changed files with 30 additions and 2 deletions

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32

arch/arm/mm/proc-v7.S

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