cxl: add RAS status unmasking for CXL

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By default the CXL RAS mask registers bits are defaulted to 1's and
suppress all error reporting. If the kernel has negotiated ownership
of error handling for CXL then unmask the mask registers by writing 0s.

PCI_EXP_DEVCTL capability is checked to see uncorrectable or correctable
errors bits are set before unmasking the respective errors.

Acked-by: Bjorn Helgaas <bhelgaas@google.com>  # pci_regs.h
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167639402301.778884.12556849214955646539.stgit@djiang5-mobl3.local
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

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Dave Jiang 2023-02-14 10:00:24 -07:00 • committed by Dan Williams

parent 1922a6dc05

commit 248529edc8

3 changed files with 67 additions and 0 deletions

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1

drivers/cxl/cxl.h

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65

drivers/cxl/pci.c

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1

include/uapi/linux/pci_regs.h

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