drm/i915: fix issue in display pipe setup on IGDNG

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During pipe DPMS off, instead of busy waiting pipe off, insert
delays during wait and don't loop after enough tries which matches
spec requirement. Also try to match DPMS on path by disable FDI TX
PLL in DPMS off. Disable PF by writing PF_WIN_SZ which really trigger
the update.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

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Zhenyu Wang 2009-07-24 01:00:29 +08:00 • committed by Eric Anholt

parent 24f119c769

commit 249c0e64c2

2 changed files with 46 additions and 12 deletions

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2

drivers/gpu/drm/i915/i915_reg.h

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56

drivers/gpu/drm/i915/intel_display.c

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