drm/i915/dsi: Enable dithering for 6 bpc panels

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The display engine has 2 dithering enable bits which both need to be set
for dithering to happen, 1 in the PIPECONF register which is taken care of
by i9xx_set_pipeconf() and a second bit at the encoder level.

The dsi code was not setting the encoder level dithering enable bit causing
dithering to be disabled, this commit fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181201113148.23184-2-hdegoede@redhat.com

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This commit is contained in:

Hans de Goede 2018-12-01 12:31:46 +01:00

parent ca0b04db14

commit 24bf86ccf9

1 changed files with 4 additions and 0 deletions

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drivers/gpu/drm/i915/vlv_dsi.c

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