drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit

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For BXT, description of polarities of PORT_PLL_REF_SEL
has been reversed for newer Gen9LP steppings according to the
recent update in Bspec. This bit now should be set for
"Non-SSC" mode for all Gen9LP starting from B0 stepping.

v2: Only B0 and newer stepping should be affected by this
change.

Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94866
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1458176773-26925-1-git-send-email-dongwon.kim@intel.com

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Dongwon Kim 2016-03-16 18:06:13 -07:00 • committed by Imre Deak

parent c0ead7039a

commit 25a5670533

1 changed files with 9 additions and 1 deletions

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drivers/gpu/drm/i915/intel_dpll_mgr.c

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