mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/
synced 2026-11-10 20:48:12 +00:00
RISC-V Devicetrees for v6.20 (or v7.0)
Anlogic: Minor change to the extension information, to add the "b" extension that's a catch-all for 3 of the extensions already in the dts. Starfive: Append the jh7110 compatible to jh7110s devicetrees, as that will enable OpenSBI etc to run without adding support for this minor variant. The "s" device differs from the non "s" device only in thermal limits and voltage/frequency characteristics. Microchip: Redo the mpfs clock setup yet again, to something approaching correct. The original binding conjured up for the platform was wildly inaccurate, and even with the original improvements, a bigger change to using syscons was required to support several peripherals that also inhabit the memory regions that the clocks lie in. The damage to the dts isn't that bad in the end, and of course the whole thing has been done in a backwards compatible manner, with the code changes being merged a cycle or two ago in the kernel and like a year ago in U-Boot (the only other user that I am aware of). Generic: Additions to extensions.yaml, mainly for things in the "rva23" profile that appear for the first time on the Spacemit K3 SoC. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaXpxIgAKCRB4tDGHoIJi 0mQcAQC8QEci1lhxDUJvMW2DdvDnM2l/D4Fw6XUMHB3AkoaWIgD+MqhU0LzES8wG IxdJN2WzaaOAVE83zMaSgpdi5Y497wU= =Ntyt -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml6j9oACgkQmmx57+YA GNmQWRAAmQ3cmwtY+HyZazjBuSlGBdWeziq9LQcTz7I58PO3M+8bR8AiQ2SjBHsL iYd7oezxjC7CIOXarwgX/HFS60G0d3rpWqAr1bxBsO+tWAiswQiE8/KVCWuY31ER Gq4ulAT3TrIYt5PNbAkKSM6csXZ8/NCORC/XQb7zk7LjQCg+H4ny7cE8//klXmCx BMAIb2RoCJSzIBjFLz9eS404l+GNnqVBXbxtvbQZUCHuAJWUns3yVnod4IPzVc9e APc2gDRHbRL/iGprVvD4yeZ/7x5GYpi8MR4W9nvvSxKvbhn5+ZOFN0e8LGBZuN2I XdLqdyZ8NYB7c8V3KIoTkrO68A/mBuQHjSI0UfyW2qUSQ52ZWmY/Q0H/+N1cHZCo /Rpqly6lIwICRzVEc84OfIikM0pEfg8QmDmcdzn8EppULV49natkoTgxIPkqdAsz yOEPYa8zLH/G8PdVNe84ZCn4D/BM1Iu4Y4Z/t2Ib+Vr3Ai8ZP96ZoHuc+JPzvunW F2lIdQ3AZhD+7HX2pyXWH7sZSKNc747AE5cEpnH+3WndF9XCPG8mFNvxOR17pFS+ YGWk91YMOnfpq+P51l9M8whhRTYNav/M411dY7pgLx9UCsheXotdRrqrfYHAEFS7 gCLAR4W1wXnVDFMRHQ8OJiaT8vPlrVbpSy1S+OuCo6nIFpFDO4g= =58in -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.20 (or v7.0) Anlogic: Minor change to the extension information, to add the "b" extension that's a catch-all for 3 of the extensions already in the dts. Starfive: Append the jh7110 compatible to jh7110s devicetrees, as that will enable OpenSBI etc to run without adding support for this minor variant. The "s" device differs from the non "s" device only in thermal limits and voltage/frequency characteristics. Microchip: Redo the mpfs clock setup yet again, to something approaching correct. The original binding conjured up for the platform was wildly inaccurate, and even with the original improvements, a bigger change to using syscons was required to support several peripherals that also inhabit the memory regions that the clocks lie in. The damage to the dts isn't that bad in the end, and of course the whole thing has been done in a backwards compatible manner, with the code changes being merged a cycle or two ago in the kernel and like a year ago in U-Boot (the only other user that I am aware of). Generic: Additions to extensions.yaml, mainly for things in the "rva23" profile that appear for the first time on the Spacemit K3 SoC. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: anlogic: dr1v90: Add "b" ISA extension dt-bindings: riscv: extensions: Drop unnecessary select schema dt-bindings: riscv: Add Sha and its comprised extensions dt-bindings: riscv: Add Ssccptr, Sscounterenw, Sstvala, Sstvecd, Ssu64xl dt-bindings: riscv: Add descriptions for Za64rs, Ziccamoa, Ziccif, and Zicclsm dt-bindings: riscv: Add B ISA extension description dt-bindings: riscv: update ratified version of h, svinval, svnapot, svpbmt riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite eMMC board riscv: dts: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board dt-bindings: riscv: starfive: Append JH-7110 SoC compatible to VisionFive 2 Lite board riscv: dts: microchip: convert clock and reset to use syscon riscv: dts: microchip: fix mailbox description Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
25ed1e9840
6 changed files with 210 additions and 28 deletions
Loading…
Add table
Add a link
Reference in a new issue