clk: sifive: Fix the wrong bit field shift

Browse source

The clk enable bit should be 31 instead of 24.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reported-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Link: https://lore.kernel.org/r/20201209094916.17383-5-zong.li@sifive.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

...

This commit is contained in:

Zong Li 2020-12-09 17:49:15 +08:00 • committed by Stephen Boyd

parent efc91ae43c

commit 263ac39085

1 changed files with 2 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

4

drivers/clk/sifive/sifive-prci.h

View file