drm/i915/psr: Fall back to max. synchronization latency if DPCD read fails

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Noticed that we assume the best case of 0 latency when the DPCD read
fails, reasonable pessimism is safer.

eDP spec does say that if latency is greater than 8, the panel
supplier needs to provide it. I didn't see anything specific in the VBT
for this, so let's go with 8 frames as a fallback.

Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180511195145.3829-5-dhinakaran.pandiyan@intel.com

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Dhinakaran Pandiyan 2018-05-11 12:51:44 -07:00 • committed by Jani Nikula

parent 1e8b251ebc

commit 264ff016cf

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/i915/intel_psr.c

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