drm/panfrost: Support cache-coherent integrations

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When the GPU's ACE-Lite interface is fully wired up and capable of
snooping CPU caches, it may be described as "dma-coherent" in
devicetree, which will already inform the DMA layer not to perform
unnecessary cache maintenance. However, we still need to ensure that
the GPU uses the appropriate cacheable outer-shareable attributes in
order to generate the requisite snoop signals, and that CPU mappings
don't create a mismatch by using a non-cacheable type either.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7024ce18c1cb1a226e918037d49175571db0b436.1600780574.git.robin.murphy@arm.com

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Robin Murphy 2020-09-22 15:16:49 +01:00 • committed by Neil Armstrong

parent 728da60da7

commit 268af50f38

4 changed files with 6 additions and 0 deletions

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1

drivers/gpu/drm/panfrost/panfrost_device.h

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drivers/gpu/drm/panfrost/panfrost_drv.c

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drivers/gpu/drm/panfrost/panfrost_gem.c

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drivers/gpu/drm/panfrost/panfrost_mmu.c

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