clk: ingenic: support PLLs with no bypass bit

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The second PLL of the JZ4770 does not have a bypass bit.
This commit makes it possible to support it with the current common CGU
code.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Maarten ter Huurne <maarten@treewalker.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18479/
Signed-off-by: James Hogan <jhogan@kernel.org>

...

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Paul Cercueil 2018-01-16 16:47:53 +01:00 • committed by James Hogan

parent e6cfa64375

commit 268db077ac

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2 changed files with 4 additions and 1 deletions

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3

drivers/clk/ingenic/cgu.c

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2

drivers/clk/ingenic/cgu.h

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