spi: cadence: Add clock configuration for Marvell xSPI overlay

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Add support for clock divider. Divider block can disable, enable and
divide clock signal. Only 14 different divide ratios are avalible, from
6.25 up to 200MHz. For calculations use default Marvell system clock
value(800MHz).

Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
Link: https://patch.msgid.link/20240724154739.582367-4-wsadowski@marvell.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Witold Sadowski 2024-07-24 08:47:33 -07:00 • committed by Mark Brown

parent b0d06169a7

commit 26d34fdc49

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1 changed files with 95 additions and 2 deletions

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drivers/spi/spi-cadence-xspi.c

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