clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets

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Add LCDC{0,1} clocks and resets entries to the r9a09g047 CPG driver.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Link: https://patch.msgid.link/c1b5afcef8068d4d074aff97e30b4d64b7c38eaf.1775636898.git.tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Tommaso Merciai 2026-04-08 12:36:53 +02:00 • committed by Geert Uytterhoeven

parent fe9a5541f0

commit 272a6e2ad1

1 changed files with 14 additions and 0 deletions

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drivers/clk/renesas/r9a09g047-cpg.c

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