KVM: arm64: Move GICv3 broken SEIS implementation detection to a CPU errrata

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Using is_midr_in_range_list() in a noinstr function isn't a good idea.
And yet kvm_compute_ich_hcr_trap_bits() is doing that by calling
vgic_v3_broken_seis().

Move all the broken SEIS detection logic to the errata detection
framework, and use a new ARM64_WORKAROUND_GICv3_BROKEN_SEIS cap
to indicate that we're running on broken CPUs.

This reuses the MIDR list used for IMPDEF PMU detection, which
has a 100% overlap with the SEIS stuff...

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://patch.msgid.link/20260721170754.3150521-3-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>

...

This commit is contained in:

Marc Zyngier 2026-07-21 18:07:50 +01:00 • committed by Oliver Upton

parent 719e67103c

commit 27a263e1a0

3 changed files with 20 additions and 26 deletions

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17

arch/arm64/kernel/cpu_errata.c

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26

arch/arm64/kvm/vgic/vgic-v3.c

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1

arch/arm64/tools/cpucaps

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