drm/i915: Make cdclk part of the atomic state.

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The skylake scalers depend on the cdclk freq, but that frequency can
change during a modeset. So when a modeset happens calculate the new
cdclk in the atomic state. With the transitional helpers gone the
cached value can be used in the scaler, and committed after all
crtc's are disabled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90874
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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This commit is contained in:

Maarten Lankhorst 2015-06-15 12:33:56 +02:00 • committed by Daniel Vetter

parent c389c9c4d9

commit 27c329ed16

4 changed files with 135 additions and 145 deletions

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3

drivers/gpu/drm/i915/i915_drv.h

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2

drivers/gpu/drm/i915/intel_atomic.c

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274

drivers/gpu/drm/i915/intel_display.c

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1

drivers/gpu/drm/i915/intel_drv.h

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