drm/i915/icl: Define register for DSI PLL

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This patch adds the new registers and corresponding bit definitions
which will be used for programming/enable DSI PLL.

v2: Review comments from Jani N
    - Fix spaces while defining ICL_ESC_CLK_DIV_MASK
    - Define shift and mask for bitfields.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1530795727-28644-2-git-send-email-madhav.chauhan@intel.com

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Madhav Chauhan 2018-07-05 18:31:48 +05:30 • committed by Jani Nikula

parent 0f17d5dd21

commit 27efd2566c

1 changed files with 15 additions and 0 deletions

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drivers/gpu/drm/i915/i915_reg.h

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