drm/i915/xe3plpd: Map AUX power domains to DC_off

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From Xe2Lpd we removed the step to disable DC5/6 because as per Bspec
for SNPS PHY Aux will be always up. But from Xe3p LT PHY was introduced
which powers down the PHY. Which means we need to make sure
"Disable DC5/6" of AUX Programming sequence is honored.
Add the AUX power domains to the DC_off power well on Xe3p_LPD+, so that
DC5/6 stays disabled for as long as an AUX power domain is held.

Bspec: 68851, 68967
Suggested-by: Imre Deak <imre.deak@intel.com>
Co-developed-by: Ramanaidu Naladala <ramanaidu.naladala@intel.com>
Signed-off-by: Ramanaidu Naladala <ramanaidu.naladala@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patch.msgid.link/20260921022016.1525322-1-suraj.kandpal@intel.com

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Suraj Kandpal 2026-09-21 07:50:17 +05:30

parent b452f1fe71

commit 2827c44f14

1 changed files with 41 additions and 1 deletions

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drivers/gpu/drm/i915/display/intel_display_power_map.c

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