drm/i915: Configure TRANS_SET_CONTEXT_LATENCY correctly on ADL+

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On TGL VBLANK.VBLANK_START was the mechanism by which we can
delay the pipe's internal vblank in relation to the transcoder's
vblank. On ADL+ that no longer does anything. Instead we must
now use the new TRANS_SET_CONTEXT_LATENCY register. Program it
accordingly.

And since VBLANK.VBLANK_START is no longer used by the hardware
on ADL+ let's just zero it out to make it stand out in register
dumps. Seeing the zeroed value should hopefully remind people
to check the other register instead.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230213225258.2127-11-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>

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This commit is contained in:

Ville Syrjälä 2023-02-14 00:52:56 +02:00

parent bfa5969e11

commit 2846cf3fdb

1 changed files with 25 additions and 3 deletions

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drivers/gpu/drm/i915/display/intel_display.c

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