drm/i915/display: Switch DC3CO enable from standalone bit to DC level encoding

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On platforms prior to xe3, DC3CO was controlled via a standalone enable
bit. Starting with xe3, DC3CO is encoded as part of the existing
DC_STATE_EN_UPTO_DC* field.

No functional change, as DC3CO is not enabled on platforms prior to xe3.

Changes in v2:
- Update commit header (Uma Shankar)

Changes in v3:
- Update bit mask to reflect DC3CO (Manna Animesh)

Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patch.msgid.link/20260616162154.2630995-3-dibin.moolakadan.subrahmanian@intel.com

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This commit is contained in:

Dibin Moolakadan Subrahmanian 2026-06-16 21:51:40 +05:30 • committed by Animesh Manna

parent 4aa633b8e7

commit 28750a28da

4 changed files with 10 additions and 10 deletions

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8

drivers/gpu/drm/i915/display/intel_display_power.c

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6

drivers/gpu/drm/i915/display/intel_display_power_well.c

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4

drivers/gpu/drm/i915/display/intel_display_regs.h

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2

drivers/gpu/drm/i915/display/intel_dmc_wl.c

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