drm/i915/dsc: Add Selective Update register definitions

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commit c2c79c6d5b upstream.

Add definitions for DSC_SU_PARAMETER_SET_0_DSC0 and
DSC_SU_PARAMETER_SET_0_DSC1 registers. These are for Selective Update Early
Transport configuration.

Bspec: 71709
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20260304113011.626542-3-jouni.hogander@intel.com
(cherry picked from commit 24f96d903d)
Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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Jouni Högander 2026-03-04 13:30:09 +02:00 • committed by Greg Kroah-Hartman

parent 3d80ebe6d1

commit 291d19d586

1 changed files with 12 additions and 0 deletions

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drivers/gpu/drm/i915/display/intel_vdsc_regs.h

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