drm/amd/display: Enable ISHARP support for DCN401

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[Why]
Enable sharpener support for DCN401

[How]
- Removed memcmp check that was preventing ISHARP from being enabled.
- Add missing ISHARP register defines, masks, and writes.
- Add programming of Blur and Scale coefficients.
- Program FMT_MODE and NLDELTA registers based on LLS_PREF and pixel
- format
- Only enable ISHARP for YUV420
- Add disabling of ISHARP
- Add debug flags and registry keys for debugging ISHARP.
- Set default to medium level

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Samson Tam 2024-04-26 12:17:26 -04:00 • committed by Alex Deucher

parent c2edec1676

commit 2998bccfa4

8 changed files with 223 additions and 65 deletions

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1

drivers/gpu/drm/amd/display/dc/dc.h

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29

drivers/gpu/drm/amd/display/dc/dc_spl_translate.c

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145

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp_dscl.c

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13

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h

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81

drivers/gpu/drm/amd/display/dc/spl/dc_spl.c

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8

drivers/gpu/drm/amd/display/dc/spl/dc_spl_isharp_filters.c

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4

drivers/gpu/drm/amd/display/dc/spl/dc_spl_isharp_filters.h

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3

drivers/gpu/drm/amd/display/dc/spl/dc_spl_types.h

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