i3c: mipi-i3c-hci: Add DMA ring abort/reset quirk for Intel controllers

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Some Intel I3C HCI controllers cannot reliably restart a DMA ring after an
ABORT.  Additional queue resets are required to recover, and must be
performed using PIO reset bits even while operating in DMA mode.

This behavior is non-standard.  Introduce a controller quirk to opt into
the required PIO queue resets after a DMA ring abort, and enable it for
Intel LPSS I3C controllers.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260603090754.16252-10-adrian.hunter@intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

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Adrian Hunter 2026-06-03 12:07:46 +03:00 • committed by Alexandre Belloni

parent a53891532a

commit 29ca24fbd2

3 changed files with 20 additions and 1 deletions

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15

drivers/i3c/master/mipi-i3c-hci/core.c

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4

drivers/i3c/master/mipi-i3c-hci/dma.c

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2

drivers/i3c/master/mipi-i3c-hci/hci.h

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