drm/i915: Handle 320 vs. 333 MHz cdclk on vlv

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Depending on the HPLL frequency one of the supported cdclk frquencies is
either 320MHz or 333MHz. Figure out which one it is to accurately pick
the minimal required cdclk. This would also avoid a warning from the
cdclk code where it compares the actual cdclk read out from the hardware
with a value that was calculated using valleyview_calc_cdclk().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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Ville Syrjälä 2014-06-13 13:37:50 +03:00 • committed by Daniel Vetter

parent d197b7d348

commit 29dc7ef3bb

1 changed files with 6 additions and 3 deletions

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drivers/gpu/drm/i915/intel_display.c

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