dt-bindings: clock: fsl-sai: Document i.MX8M support

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The i.MX8M/Mini/Nano/Plus variant of the SAI IP has control registers
shifted by +8 bytes and requires additional bus clock. Document support
for the i.MX8M variant of the IP with this register shift and additional
clock. Update the description slightly.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Marek Vasut <marex@nabladev.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Marek Vasut 2026-04-09 02:29:01 +02:00 • committed by Stephen Boyd

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Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml

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