drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+

Browse source

On B0 and C0 steppings the workaround enable bit would be overriden by
default, so the overriding must be disabled.

The WA was added in
commit 83a24979c4
Author: Nick Hoath <nicholas.hoath@intel.com>
Date:   Fri Apr 10 13:12:26 2015 +0100

    drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent

Spotted-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

...

This commit is contained in:

Imre Deak 2015-05-19 17:05:41 +03:00 • committed by Daniel Vetter

parent 118182e9d7

commit 2a0ee94fef

2 changed files with 6 additions and 2 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

1

drivers/gpu/drm/i915/i915_reg.h

View file

7

drivers/gpu/drm/i915/intel_ringbuffer.c

View file